Challenge

CMOS-based Silicon-based microelectronics technology is facing an unprecedented energy challenge as artificial Intelligence technologies are predicted to have enormous requirements trending toward reaching global energy limits. As we look beyond Moore’s Law and face challenges related to scaling, we are reaching the limits of what can be achieved at the atomic level of transistors. This situation presents both a necessity and an opportunity to rethink the materials used in microelectronics and to innovate the design process.

News & Highlights

Heterogeneous integration of boron-doped p-diamond with monolayer n-MoS₂ for PN junctions operating at room temperature.
Nano Letters

Scientific Hypothesis

Understanding the interconnected fundamental interfacial properties (electronic, lattice, and thermal) of dissimilar 2D and 3D materials stacks within M3D HI structures will enable facile tunability of the properties (electronic, optoelectronic) of the constituent materials beyond traditional means of disparately engineering individual materials.

Research Operational Hypothesis

Closely coordinated, concerted collaboration and integration of the state-of-the-art resources of all the DOE NSRCs can develop and provide new capabilities tailored to the synthesis, integration, multimodal operando characterization, and machine-learning-based co-design frameworks towards system-level performance and efficiency enhancement, indispensable for realizing and accelerating the adoption of M3D HI.